Modern electronic systems typically contain many components including, for example, processors (or microcontrollers), main boards, memories, storage, graphics processors, and the like. One goal of manufacturers is to improve performance by increasing the speed at which an electronic system operates. Consequently, processor speed has increased steadily over the years.
Performance improvements of the various components in electronic systems, however, have not all been related to speed improvements. As a result, certain parts of an electronic system may run at different speeds (or clock frequencies) relative to one another. For example, a user interface of an electronic system (for receiving user commands) may be asynchronous (i.e., operating at a different clock frequency or an independent clock frequency) relative to a processor, memory controller or bus in the electronic system. In addition, the operating speed of the processor, may change during operation, e.g., for power conservation.
As discussed above, one example of an operational mismatch in speed can occur between a user interface, and a processor and memory controller within an electronic system—i.e. the user interface may operate at a user clock frequency that is different from a system digital clock frequency associated with the processor and memory controller. If the processor manages synchronization of data (received through the user interface) between the user interface and the memory controller, then performance throughout the electronic system may decline. By offloading the synchronization of data to the memory controller, performance for the system can be improved.
Accordingly, what is needed is method and apparatus for synchronizing data between different clock domains in a memory controller. The present invention addresses such a need.